Previous IMR Seminars

Research and Advancement in Nanotechnology and Nanoelectronics in the Semiconductor Industry

Dr. Robert Chau, Intel Corporation
Friday, August 31, 2007
3:00 p.m. - 4:00 p.m.
Scott Laboratory Room E001
Hors d’oeuvres reception to follow in Scott Laboratory Room E100

Abstract

This presentation will first summarize some of the most recent silicon innovations made for advanced CMOS transistors in the nanotechnology era for high-speed and energy-efficient VLSI applications. Through these Si nanotechnologies, it is expected that the CMOS downscaling and improved performance trends will extend and continue well into the next decade. In addition, there has been good progress made and much interest generated in the research of non-silicon electronic materials and their integration onto the silicon substrate to enhance chip performance, provide more functions, and reduce power dissipation. For instance, III-V compound semiconductors and high-mobility quantum-well transistors and their integration onto silicon are currently in research for future high-speed and ultra-low-power digital CMOS applications. Emerging nano-materials and nanotechnologies such as nanotubes, nanowires and nanoribbons, as well as new areas such as non-charge based devices and spintronics, are being explored for future computation and data storage applications. The research progress of these emerging nanotechnologies and nanoelectronic devices, and the challenges and opportunities of combining top-down and bottom-up nanoelectronics, will be discussed in this presentation.

Bio

Dr. Robert Chau is an Intel Senior Fellow, the company’s highest and most prestigious technical position, and the Director of Transistor Research and Nanotechnology at Intel Corporation. He is responsible for directing research and development in advanced transistors and gate dielectrics, process modules and technologies, and integrated circuit processes for microprocessor applications. He is also responsible for leading research efforts in novel electronic materials and emerging nanotechnologies for future nanoelectronics applications.

Dr. Chau holds more than 125 issued United States patents, has received six Intel Achievement Awards and 13 Intel Logic Technology Development Division Recognition Awards, and was recognized by IndustryWeek in 2003 as one of the 16 "R&D Stars" in the United States who “continue to push the boundaries of technical and scientific achievement.” He has been elected a Fellow of the Institute of Electrical and Electronics Engineers (IEEE).

Dr. Chau received his B.S., M.S., and Ph.D. degrees, all in electrical engineering, from The Ohio State University. He was the recipient of the 2003 Alumni Professional Achievement Award from The Ohio State University Alumni Association, and is the recipient of the 2007 Distinguished Alumnus Award from the College of Engineering of The Ohio State University.

This IMR Colloquium is sponsored by the OSU Institute for Materials Research